| 摘要 |
PURPOSE:To reduce the electric current of the address buffer, by configuring the titled circuit in such a way that plural PNP type transistors are connected in parallel and each base current is extracted by the output of plural selected address buffers. CONSTITUTION:Transistors T1-T3 are connected in parallel, each emitter of the transistors T1-T3 are commonly connected to a load resistance R, and each base consisting of emitter followers is connected to address buffers AB1.... Inputs of a word driver WD1 become a1, a2, and a3 and, when all of the inputs are H, all the transistors T1-T3 become off and an electric current ID flows toward a transistor EF. Since the inputs a1-a3 which set addresses A1-A3 to H are L, on the contrary, all the transistors T1-T3 of the word driver WD1 become on and the electric current ID which flows to the load resistance R is separated into three flows by the transistors T1-T3. The base electric current is 1/(beta+1) of the electric current flowing from the emitter, and, therefore, total sum of the electric current flowing into a transistor T11 of the address buffer AB1 is also reduced to 1/(beta+1). |
