| 摘要 |
<p>A semiconductor memory device comprises an output buffer circuit (16) which receives data signals (RD, RD) read out from a memory cell array (11, 12), an output stage MOS transistor (17) which is turned ON and OFF according to the output signals of the output buffer circuit, and an OBE (output buffer enable) signal generator circuit (19) for generating an OBE signal which is used as the voltage supply to the output stage of the output buffer circuit. A circuit (20) is provided for generating a voltage VBS which is higher than the supply voltage VCC before the rise of the OBE signal. The voltage VBS is used as a voltage supply to the output stage of the OBE signal generator circuit, whereby the OBE signal is formed as a voltage waveform which rises rapidly to a level which is higher than the supply voltage VCC. This speeds up the rise time of the data output Dout from the output stage (17), and hence decreases the access time of the memory device.</p> |
