| 摘要 |
PURPOSE:To prevent a latch-up of a C-MIS IC device due to the noise from a power sounrce and to the rise of a power source voltage by providing a constant-voltage circuit in parallel with a conductive type MIS transistor nd reversely conductive type MIS transistor between high voltage source and a low voltage source of the C-MIS IC. CONSTITUTION:An inverter circuit having a P channel MIS element TP and an n channel MIS element TN is provided between a high voltage source VDD and a low volage source VSS, and a constant-voltage circuit using a zener diode ZD is provided in parallel with the inverter circuit between the voltage souces VDD and VSS. That is, a P type well region is diffused in an N<-> type semiconductor substrate, an N<+> type region 1 is formed at the end of the well region to form a zener diode, N<+> type source and drain regions 3, 5 sandwiching a channel region 4 are provided around P<+> type guard rings 2, 6 in the same well region, thereby forming an N channel element. Similarly, P<+> type source and drain regions 8, 10 sandwiching N<+> type guard rings 7, 10 and channel 9 are formed in a substrate having no well region, thereby forming a P channel element. |
