| 摘要 |
A jump return stack is provided in a data processor having a plurality of control registers including a fetch control register and an execution control register. The jump return stack comprises a memory stack, an address register, and a counter-register interposed between the memory stack and the control registers of the data processor. The counter-register is always made to store the latest entry into the memory stack, that is the top of the stack, such that the latest entry into the stack is immediately available to the control registers of the data processor thereby eliminating a memory access to the stack. |
