| 摘要 |
PURPOSE:To reduce the area occupied by load as well as to obtain high intergration for the subject semiconductor integrated circuit by a method wherein a Schottky barrier diode is used as the element for load MISFET. CONSTITUTION:An insulating film 7 such as SiO2 and the like is formed on the surface of the silicon substrate whereon a P type layer 2 was formed contacting an N<+> type layer 1. Subsequently, an aperture is formed on the film 7 excluding a part, and an N type region 3 is formed by diffusing N type impurities from this aparture. The surface of the aperture is then covered by the insulating film 7. N type regions 4 and 5 and a P<+> type region 6 are formed in the same manner. An aperture is formed by removing each surface part of the regions 3- 6 on the insulating film 7. Then a metal material, whereon an N type region 3 and a Schottky barrier can be formed, is attached, while an unnecessary part is removed and electrodes 8, 9 and 10 are formed. |
