| 摘要 |
PURPOSE:To eliminate the stoppage of an inverter by providing a time limiter circuit which generates the prescribed time signal in accordance with the output of a comparator which compares the current of an inverter main circuit with a reference signal, and determining the output frequency of the inverter in accordance with the output of the time limiter. CONSTITUTION:A DC bus current detection signal If is compared by a comparator 11 with a stall preventive level reference signal Iref. When a main circuit current increases and the signal IF becomes higher than the signal Iref, the comparator 11 operates, with the result that a monostable multivibrator 12 produces a pulse, this output pulse is inputted to a frequency instructing circuit 8, and the output frequency of the inverter is fixed. |
