发明名称 MICROPROGRAM CONTROL SYSTEM
摘要 PURPOSE:To trace the address of a microprogram and to achieve analysis at error production, by using a writable control storage WCS when it is not in use, in a CPU incorporating the WCS. CONSTITUTION:An RAM23 storing a microprogram consisting of a plurality of microinstructions is rewritten for the content of the microinstruction through an input signal line 12 of an external data and read out through a data output signal line 13. A data register 24 stores the microinstruction read out from an ROM22 or the RAM23. Gates 25 and 26 selects either one of the outputs of the ROM22 and the RAM23 when they are transferred to the data register 24, and the output is wired-ORed. When a counter 27 inputs data to the RAM23, the counter 27 stores the address and the content is renewed with external clock.
申请公布号 JPS57153345(A) 申请公布日期 1982.09.21
申请号 JP19810037800 申请日期 1981.03.18
申请人 TOKYO SHIBAURA DENKI KK 发明人 AOYANAGI KEIZOU
分类号 G06F9/22;G06F11/28;G06F11/30 主分类号 G06F9/22
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