发明名称 A/D CONVERTING CIRCUIT
摘要 PURPOSE:To vary optionally the input/output characteristics of an A/D converting circuit, by changing the reference level of a ladder-type network, which is divided equally and outputs a reference signal, in accordance with the variation of an input signal. CONSTITUTION:An input signal S1 is applied to not only a comparator group 2 but also a signal processing circuit 5. The input signal S1 is reduced to 1/K by the signal processing circuit 5, and this reduced signal is set to a lower potential VRL of a ladder-type network 1. A digital signal obtained by encoding the output of the comparator group 2 by an encoder 3 is equivalent to a signal obtained by converting nonlinearly the input signal S1. When various function generators are used as the signal processing circuit 5, various nonlinear conversions are possible.
申请公布号 JPS57152726(A) 申请公布日期 1982.09.21
申请号 JP19810037269 申请日期 1981.03.17
申请人 TOKYO SHIBAURA DENKI KK 发明人 HARA KIYOSHI
分类号 H03M1/36;(IPC1-7):03K13/175 主分类号 H03M1/36
代理机构 代理人
主权项
地址