| 摘要 |
PURPOSE:To realize sure operation of the power-on-reset function, by using an enhancement type insulated gate field effect transistor (FET). CONSTITUTION:An enhancement type insulated gate FET Q7 is connected as shown in the diagram. When the power source is off, the electric potential of all contacts is equal to that of earthing points 3 under balanced condition. When the powr source is on, an output terminal 1 is raised to the supply voltage Vb side. Then, a transistor Q5 is made into non-conductive state after the circuit is reversed to the 2nd stable condition by the conduction of the transistor Q5. When the power supply is cut after this condition, transistors Q2 and Q4 are made into non-conductive state but the transistor Q7 is conducted when the electric potential of the power source D drops to VD-2VT1 and discharges. Therefore, the electric potential at an output terminal 2 is raised to VT1. Accordingly, when the power source is again turned on, the electric potential at the putput terminal 2 is scarely raised to VD-VT1 level, and, when the logical threshold of the 1st inverter is high, the electric potential of the output 2 drops and becomes the initial condition. |
