发明名称 Bipolar integrated injection logic cell of reduced area - retains logic speed using buried PNP transistor under isolated logic cell and has Schottky diodes at operator output
摘要 <p>The cell incorporates a PNP injection transistor within the insulated cell containing the NPN transistor and its Schottky diode outputs. The P type silicon substrate is covered by an N type epitaxial layer. Between these layers is buried an N+ layer and a lightly doped P-type base layer. Each logic cell is isolated by deep boxes of silicon dioxide. The buried base layer extends across the surface of each individual logic cell but the other buried layer extends over several cells, uninterrupted by the cell walls. Separate surface metallisations are used to form the base region contacts and the Schottky diode outputs. The integrated circuit is produced by a diffusion over most of the substrate of antimony, followed by a faster diffusion of Boron impurities. A lightly doped epitaxial layer is grown on the substrate and the surface s oxidised. The treated substrate is etched chemically to produce troughs and these are oxidised to produce insulating walls. Further troughs are etched and doped to produce contacts to the buried regions. The surface is then selectively metallised . The PNP transistor is buried beneath the logic cell.</p>
申请公布号 FR2501910(A1) 申请公布日期 1982.09.17
申请号 FR19810005131 申请日期 1981.03.13
申请人 THOMSON CSF 发明人 MAURICE DEPEY
分类号 H01L21/8226;H01L27/02;H03K19/091;(IPC1-7):01L27/06;03K19/091;01L21/72 主分类号 H01L21/8226
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