| 摘要 |
PURPOSE:To guarantee the access state of a corresponding block to a reference bit of a main storage key, by providing a means which makes the content of a buffer storage device ineffective at each prescribed interval, in a data processor having a main storage key at a main storage device side. CONSTITUTION:A main storage device 1 is split into a plurality of blocks, a main storage controller 2 controls the device 1 and has a main storage key 3 corresponding to each block. A CPU4 consists of a buffer storage device 5 having a copy of a part of a content of the device 1 and an operating device 6 making the execution of instruction. In the CPU4, a clock mechanism consisting of an input latch 20, an adder 21, and an output latch 22 is provided, and the content of the device 5 can be made ineffective at a prescribed interval by inputting the output of a latch 23 to a control storage controller 24. Further, although block transfer from the device 1 to the device 5 is caused to the instruction or data readout (write-in) request, since the reference bit of the main storage key of the corresponding block goes to 1, the access state is guaranteed. |
