发明名称 PIPELINE COMPUTER
摘要 PURPOSE:To greatly improve the disturbance of an instruction stream, by prefetching the stream of the branching instruction and having a smooth shift of an instruction stream. CONSTITUTION:The logic product of tags 16a-16e corresponding to the instructions stored in the instruction cues 10a-10d as well as the instruction under execution is set at ''1'', and the conditional code in a state register 18 is not changed by any instruction. As a result, whether or not the branching conditions are satisfied is generally decided by the field constant under the branching instruction and a logic operation of the conditional code. When the branching is satisfied, the branch is transmitted to a branch control circuit 14 along with the contents of a branch address register 12. A branch control circuit 14 cancels the old instruction stream and gives a fetching request of a new instruction stream. The instruction buffers 5-8 are shown in the diagram.
申请公布号 JPS57150040(A) 申请公布日期 1982.09.16
申请号 JP19810034815 申请日期 1981.03.11
申请人 MITSUBISHI DENKI KK 发明人 SUZAKU JIROU
分类号 G06F9/38 主分类号 G06F9/38
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