| 摘要 |
PURPOSE:To obtain a semiconductor storage device in which the yield rate is improved, by blocking an address input of a normal memory at the address selection of defective memory cells, and accessing a compensation memory. CONSTITUTION:A normal address is decoded in an address decoder and a corresponding memory cell of a memory 13 is accessed. Since this address is not prepared in a compensation memory 18, no output is generated from a compensation address decoder 17, and no memory 18 is accessed. On the other hand, when the address of a defective memory cell of the memory 13 is selected, the memory 18 is accessed via the decoder 17 and a decoder 12 is controlled via the decoder 17 and a selection block circuit 19 to block the address input to the memory 13 and the defective memory cell is substituted with the compensation memory. Thus, the semiconductor storage device can substantially be increased for the yield rate. |
