| 摘要 |
PURPOSE:To achieve write at a low power consumption and read stably and surely, by reading a current voltage characteristics of a bit line load and changing the result to be suited to write. CONSTITUTION:The gate of P type transistors (TRs) Q11 and Q12 generating a voltage drop proportional to a current the same as a resistor is connected respectively in series with the drain of load TRs Q7 and Q8 of a pair of bit lines Bj0 and Bj1 of a memory cell of an asynchronous type static MOS memory. Thus, when a current flows to the lines Bj0 and Bj1, a current voltage characteristic of the load changed from a curve Ca to a curve Cc, an L level V2 at read is not changed for sure and stable reading, and a current to an L level V3 at reading is decreased from i2 to i4, allowing to achieve the write-in a low power consumption. |
