发明名称 DATA PROCESSING SYSTEM
摘要 <p>PURPOSE:To eliminate the malfunction and to know an accurate time of execution, by detecting that the execution of a program is set in a prescribed state and controlling the working of a counter circuit by the detection signal. CONSTITUTION:A microcomputer includes a central processing mechanism CPU6, a monitor interruption terminal 5 to which the signal indicating to shift the control panel of the CPU6 to a control program from a user program is supplied, a flip-flop 7 which is controlled by the CPU6, a timer 4 which has a timing or counting operation, and a timer control part 8. When it is desired to confirm the internal state of the microcomputer, an indication signal is supplied to the terminal 5. Then the CPU6 delivers a control signal 61 to set the flip- flop 7. A count stop indication is given to the part 8 by an output signal 71 of the flip-flop 7.</p>
申请公布号 JPS57150046(A) 申请公布日期 1982.09.16
申请号 JP19810035723 申请日期 1981.03.12
申请人 NIPPON DENKI KK 发明人 IWASAKI JIYUNICHI
分类号 G06F11/28;G06F11/00;G06F15/78 主分类号 G06F11/28
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