| 摘要 |
1297948 Automatic speed control R C A CORPORATION 20 March 1970 [21 March 1969] 14945/69 Heading G3R In a drive control system, a speed error signal causes rapid acceleration until a predetermined speed is reached. At this point, an auxiliary momentary error signal causes the drive to be reduced to a low level, and the subsequent error signal then ensures stabilization at the required speed. In the described embodiment, a recording tape 2 is scanned by a headwheel 14 driven by a motor 12. The motor also drives a tonewheel 18, and an associated pick-up 20 provides pulses on a line 45 indicative of the speed of motor 12. These pulses, together with reference velocity pulses on a line 46, are fed to an error detector including flip-flop circuits 40, 42, 44. In operation, assuming it is desired to accelerate the motor up to the reference velocity, the underspeed condition sets the flip-flop circuits so that a gate 54 maintains its output at earth potential. Thus the input to an amplifier 62 is earthed and maximum drive is transmitted to the motor 12. At this time, the speed error signal is held by a circuit 58, but the resulting positive output signal is overridden by the output of gate 54. When the reference velocity is reached, the output of flip-flop 44 reverses and the gate 54 feeds a high positive potential to block diode 64. At the same time, transistors 75, 91 in a differentiating circuit 70 are turned on and a positive pulse on line 99 biases the input of amplifier 62 to a positive level, reducing the drive to motor 12 to a low value so that deceleration begins. The pulse on line 99 decays with a time constant determined by an RC circuit 86, 88 until a diode 98 blocks. From this point, the error signal in holding circuit 58 takes over control, and the motor speed is rapidly stabilized at the reference velocity. |
