发明名称 |
Buffer circuit. |
摘要 |
<p>A buffer circuit, mainly comprised of a flip-flop (FF), is disclosed. The flip-flop receives an external input (ADD) via a first input circuit (IN,) and a reference voltage (REF) via a second input circuit (IN2), then produces internal complementary outputs (A,A) via an output circuit (OUT) which uses the bootstrap effect. The flip-flop cooperates with at least one level setting device (X) by way of the second input circuit (IN2). The level setting device functions to produce a voltage level (at N12) to de-activate the second input circuit (IN2) only during the activation of the flip-flop (with φ1 on).</p> |
申请公布号 |
EP0060105(A2) |
申请公布日期 |
1982.09.15 |
申请号 |
EP19820301133 |
申请日期 |
1982.03.05 |
申请人 |
FUJITSU LIMITED |
发明人 |
TAKEMAE, YOSHIHIRO;NOZAKI, SHIGEKI;MEZAWA, TSUTOMU;KABASHIMA, KATSUHIKO;ENOMOTO, SEIJI |
分类号 |
G11C11/413;G11C11/408;H03K3/356;(IPC1-7):03K3/037 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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