| 摘要 |
An apparatus for limiting the rate at which changes on an input signal are applied to the input of a load device. The input signal is clocked out of a D-type flip-flop which output provides the device actuating signal and is also applied to a means for providing a pulse of determinable duration in response to transitions on the flip-flop output signal. During the occurrence of this pulse, the clock signal to the flip-flop is inhibited, preventing a rapid sequence of transitions on the input signal from causing a correspondingly rapid sequence of load device actuations.
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