发明名称 |
Integrated circuit for transferring complementary charge packets between two charge transfer devices |
摘要 |
An integrated circuit for transferring complementary charge packets between a first and second charge transfer device has a resettable gate common to both charge transfer devices which serves as a transfer electrode for the first charge transfer device and as an electrode in the input stage of the second charge transfer device. An electrode which is maintained at a constant voltage is disposed in the second charge transfer device between the common electrode and an oppositely doped semiconductor region which is connected to a normally constant voltage which periodically is substantially reduced, thereby flooding the region beneath the common electrode with charge carriers. When the voltage connected to the oppositely doped semiconductor region is returned to a high value, a potential well is created beneath the constant voltage electrode which becomes filled with a first charge packet. Upon the appearance of the charge packet in the first transfer device beneath the common electrode, a voltage drop occurs which results in a corresponding potential drop beneath the common gate in the second charge transfer device resulting in a flow of charge carriers in reverse to the previous flow leaving a charge packet beneath the common gate which is complementary to the charge packet introduced into the first charge transfer device.
|
申请公布号 |
US4349749(A) |
申请公布日期 |
1982.09.14 |
申请号 |
US19800168650 |
申请日期 |
1980.07.11 |
申请人 |
SIEMENS AKTIENGESELLSCHAFT |
发明人 |
PFLEIDERER, HANS-JOERG;KLAR, HEINER |
分类号 |
H01L29/762;G11C19/28;G11C27/04;H01L21/339;(IPC1-7):G11C19/28;H01L29/78 |
主分类号 |
H01L29/762 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|