发明名称 INSULATED GATE FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To enable the operation of a field effect transistor at a high voltage by forming a low specific resistance diffused layer of the same conductive type as a substrate between a drain and a ground diffused region disposed in the vicinity of the drain, thereby preventing the ON state of a parasitic bipolar transistor. CONSTITUTION:A drain region 2, a source region 3 and a ground diffused region 4 of an n<+> type diffused layer are formed on a p type substrate 1. Then, a p<+> type isolation layer 6, an isolation oxidized film 5 and further a gate electrode 7 are formed for isolating between elements. When positive DC voltage is applied between the drain 2 and the region 4 in this state, the parasitic n-p-n transistor formed of the drain 2, substrate 1 and region 4 becomes ON state, a large current flows from the drain 2 side, and there exist a danger of being damaged. To eliminate this danger, a p type low specific resistance diffused layer 9 is formed between the drain 2 and the region 4, thereby preventing the ON state of the parasitic n-p-n transistor.
申请公布号 JPS57147280(A) 申请公布日期 1982.09.11
申请号 JP19810032997 申请日期 1981.03.05
申请人 MITSUBISHI DENKI KK 发明人 MIYAMOTO KAZUTOSHI;MATSUMOTO HEIHACHI
分类号 H01L29/78;H01L27/02 主分类号 H01L29/78
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