发明名称 DELAYED TRANSMITTING CIRCUIT OF HIGH FREQUENCY SIGNAL
摘要 PURPOSE:To increase the reliability for the titled circuit, by delivering a high frequency input signal (a) of an excessive level in the form of a signal (b) having a delayed rise time point via a delay control means to produce an output after a prescribed time, a variable impedance elements, etc. CONSTITUTION:When an RF signal (a) of an excessive level is supplied to an input terminal 1, this signal emerges at an output terminal C of a lambda/4 hybrid 3 and the positive voltage is supplied to a transistor TR6 via an integrating circuit consisting of elements 14 and 16 after the wave detection. The TR6 is cut off until the time T produced by the time constant of the integrating circuit elapses, and a TR7 and a diode 5 conduct. Thus the signal (a) is distributed to output terminals C and D and absorbed to the matched loads 8, 9, etc. not to emerge at an absorbing terminal B. When the time T elapses, the diode 5 is cut off with the terminal D released from the earth. Thus the signal (b) is distributed to the terminals D and B to be delivered to a terminal 2. In such a way, only the excessively level part is suppressed for the input signal to prevent an excessive excitation for the element of the final stage part.
申请公布号 JPS57147381(A) 申请公布日期 1982.09.11
申请号 JP19810031194 申请日期 1981.03.06
申请人 HITACHI DENSHI KK 发明人 TANIGUCHI NORIO
分类号 H04N5/38;(IPC1-7):04N5/38 主分类号 H04N5/38
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