| 摘要 |
PURPOSE:To obtain a modulation output with longer minimum inverting intervals, by detecting a data train with small intervals between a bit 1 and the next bit 1 with a specific means after 3-9 bit conversion and making code conversion so that sufficient bit intervals can be obtained. CONSTITUTION:A temporary storage parallel input and output register 6 is provided between a 3-9 bit code conversion encoder 3 and a transferring parallel input serial output 9-bit register, P4''-P1'' out of the outputs of the encoder 3 are inputted to the register 6 via a present data train changing circuit 7 and P9'-P7' out of the outputs of the register 6 are inputted to a register 5 via a previous data train changing circuit 8. A specific data train is detected with gates 9, 10 and 11, and a part of the data train with the change circuit 7 or 8 can be changed, and the interval between 1 of a code converted into 9-bit and the next 1 is set to a digital signal having 5-bit interval. Thus, the minimum inverting interval T required to increase the recording density can be longer than that of conventional systems by >=1.5T. |
