发明名称 PROGRAM EXECUTING STATE RECORDING SYSTEM IN MULTIPROCESSOR SYSTEM
摘要 PURPOSE:To make program debugging easy, by grasping the timing state of execution of information processing for processors in a multiprocessor system through the recording of program execution and access state in time division to a recorder sequentially. CONSTITUTION:A recording memory of a recorder records a signal outputted from a scan circuit N in 1/n of the shortest instruction executing time of each processor together with a processor number, i.e., program address number information, instruction information and read/write information and the like. A trace signal generated at each processor at the same time is selected at the scan circuit and written in a memory R in the order of scanning. A data processor D displays the information recorder in the memory R on a display device and stores it on a floppy disc. When a signal is transferred to the display device or the like in the order of recording, the relation of time such as mutual program execution state in processors 1a-1n can easily be grasped.
申请公布号 JPS57146353(A) 申请公布日期 1982.09.09
申请号 JP19810030711 申请日期 1981.03.04
申请人 FUJITSU KK;NIPPON DENSHIN DENWA KOSHA 发明人 SAITOU HAJIME;YAMADA NAOKI;YAJIMA TOSHIO;SATOU FUMITO
分类号 G06F11/34;G06F11/36;G06F15/16;G06F15/177 主分类号 G06F11/34
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