Phase detector circuit

摘要

A horizontal sync signal is applied as a reference signal pulse to a first input terminal of a phase detector (23) and furthermore as a keying or gate control pulse to a gate circuit (25). The output signal of a frequency divider (28) which divides the frequency of the output signal of a voltage-controlled oscillator (27) is applied as a comparison pulse to a second input terminal of the phase detector (23). In the phase detector (23), a phase detector or measurement pulse is obtained with a pulse width which is proportional to the phase difference between the reference pulse and the comparison pulse. This phase measurement pulse is fed in via a buffer (24) of a gate circuit (25). In the gate circuit (25), the current path from the phase measurement pulse input terminal to the output terminal is held conductive or through-connected during the cycle of the gate control pulse, an output pulse being obtained during this cycle which contains the aforementioned phase measurement pulse as a component. This output pulse is smoothed by a filter (26) and fed into the voltage-controlled oscillator (27) as an oscillation frequency control input voltage. <IMAGE>