| 摘要 |
PURPOSE:To reduce the burden in a central processor, by each channel device itself which transmits the newest status information to an input/output status information table through the use of a vacant time. CONSTITUTION:An instruction from a central processor CPU is inputted to an input and output instruction controlling circuit 16 via an instruction generating circuit under the control of a CPU and an inquiry signal is given to an I/O controlling section 4. On the other hand, address and instruction data are inputted to the circuit 16 from an address generating circuit and a channel instruction generating circuit 12 and transmits a sense instruction to the I/O controlling section 4. This sense instruction is made to correspond to the status information from the corresponding I/O and is received at an input and output information receiving circuit 17, and the data edition of an input and output status information table UCB is made at a data edition circuit 18. A vacant time is detected from the instruction from the CPU through the circuit 11 and an output instruction of the instruction controlling circuit 16 and the said editing information is stored in the UCB in a control section 2. |
