发明名称 |
Address pairing apparatus for a control store of a data processing system |
摘要 |
A data processing system includes a first memory for storing microinstructions in a first plurality of storage locations and second memory for storing microinstructions in a second plurality of storage locations. A central processor executing a series of addressed microinstructions to control the functions performed by this system generates the address of the next microinstruction to be executed in series as well as a next address selection signal. Addressing circuitry concurrently applies the next address generated by the processor to address inputs of each of the first memory and the second memory. After a predetermined delay, either the first memory or the second memory is selected to output an address microinstruction responsive to the value of the next address selection signal.
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申请公布号 |
US4348724(A) |
申请公布日期 |
1982.09.07 |
申请号 |
US19800140643 |
申请日期 |
1980.04.15 |
申请人 |
HONEYWELL INFORMATION SYSTEMS INC. |
发明人 |
CUSHING, DAVID E.;STANLEY, PHILIP E. |
分类号 |
G06F9/28;G06F9/22;G06F9/26;(IPC1-7):G06F9/26 |
主分类号 |
G06F9/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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