发明名称 |
Bus error recognition for microprogrammed data processor |
摘要 |
An integrated circuit microprocessor includes storage means coupled to a control unit for receiving from the control unit information regarding how the next bus cycle is to be run. Upon receipt of a bus error signal from a peripheral device, the storage means is reset. If, however, a halt signal accompanies the bus error signal, the storage means is not reset and the bus cycle is rerun when the halt signal terminates.
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申请公布号 |
US4348722(A) |
申请公布日期 |
1982.09.07 |
申请号 |
US19800136845 |
申请日期 |
1980.04.03 |
申请人 |
MOTOROLA, INC. |
发明人 |
GUNTER, THOMAS G.;CRUDELE, LESTER M.;ZOLNOWSKY, JOHN E. |
分类号 |
G06F11/14;(IPC1-7):G06F11/00;H04L1/00 |
主分类号 |
G06F11/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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