发明名称 |
Circuit including at least two MTL semi-conducting devices showing different rise times and logic circuits made-up therefrom |
摘要 |
The basic circuit (FIG. 2) includes an input device (A) driving two output transistors (B) and (C) which have different rise times [injection currents (I2, I3) or the input characteristics of the transistors (capacitors C2, C3) may be adjusted]. In a preferred embodiment (FIG. 3) differentiation is ensured by coupling a control transistor D to one of the output transistors (B) through a PNP transistor. If transistors (B) and (C) are cross-coupled, the circuit which is achieved is a bistable device. FIG. 4 shows the layout of the circuit of FIG. 3. Various applications in the synchronous logic circuit domain are described: T flip-flop (FIG. 8) and shift register (FIG. 9).
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申请公布号 |
US4348595(A) |
申请公布日期 |
1982.09.07 |
申请号 |
US19800186829 |
申请日期 |
1980.09.12 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
LEBESNERAIS, GERARD M. |
分类号 |
H03K19/091;H03K3/286;H03K3/288;(IPC1-7):H03K3/28;G11C19/28 |
主分类号 |
H03K19/091 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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