发明名称 PROGRAMMABLE INTEGRATED CIRCUIT FOR TIMING GENERATION
摘要 <p>PURPOSE:To obtain a flexible circuit suitable for high integration by transferring a start signal to the input terminal of an FF when the start signal is shifted to an optional bit position of a shift register. CONSTITUTION:For respective input terminals S1 and R1-S4 and R4 of FFs B1-B4, one optional bit position of a shift register A is written previously so that it is selected by a program, and when a start signal E is shifted to the stored bit position, the start signal E is transferred to the input terminals S1 and R1-S4 and S4 of the FFs B1-B4. Consequently, the shift register A and FFs B1-B4 can be connected internally, the circuit is provided with flexibility, and the number of external terminals is decreased, so that a programmable timing circuit suitable for high integration.</p>
申请公布号 JPS57143927(A) 申请公布日期 1982.09.06
申请号 JP19810030292 申请日期 1981.03.03
申请人 NIPPON DENKI KK 发明人 KOBAYASHI HIDEHIKO;KATOU AKIRA
分类号 H01L21/822;G06F1/06;H01L27/04;H03K5/15;H03K17/296 主分类号 H01L21/822
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