INSULATED GATE TYPE FIELD EFFECT TRANSISTOR

摘要

PURPOSE:To reduce ON resistance by providing a one conductive type source region in a one conductive type drain region through two reverse conductive type regions to obtain the IGFET, and providing the surface layer part having high impurity concentration in a drain region located between the two reverse conductive region. CONSTITUTION:A substrate 3 which is to become the drain region is prepared by laminating an N<+> type layer 2 and an N<-> type layer 1. A drain electrode M4 is deposited on the entire back surface of the layer 2. Then two P type regions Z1 are diffused and formed in the layer 1. Z3 which is to become a source region is provided in each region. A source electrode M1 is attached on the area from the central part of each region Z3 and to the outer edge part of each region 1. A gate electrode M2 which faces the M1 is provided on the area from each region Z3 to the edge of each region Z1 through a gate insulating film 5. Thus the FET is obtained. In this constitution, only the surface layer part of the layer 1 between the region Z1's is transformed into an N<+> type region 25, the ON resistance is decreased, and the IGFET with low power consumption is obtained.