| 摘要 |
PURPOSE:To stop a clock at the required time, by inputting an output of a logical circuit and an output of a signal polarity designating circuit, to one input terminal of an exclusive OR circuit and its other terminal, respectively, and detecting a difference between the logical circuit output and the signal polarity designating circuit output. CONSTITUTION:An output of a logical circuit 1 is divided into 2 branches, and one branch is inputted to a scan-out data register 4 through a flip-flop circuit 3 being a conventional circuit, and the other branch is inputted to one terminal of an exclusive OR circuit 10. A signal from a service processor (SVP) is inputted to a signal polarity designating circuit 11, and its output is inputted to the other terminal of the exclusive OR circuit 10. An output of the exclusive OR circuit 10 is inputted to one terminal of an AND circuit 13. To the other terminal of the AND circuit 13, an output of a flip-flop circuit 12 connected to the SVP is inputted. An output of the AND circuit 13 outputs a clock stop signal. |
