| 摘要 |
PURPOSE:To obtain an effective device for a system loop whose automatic detection has been difficult up to the present, and to elevate the efficiency and reliability of an electronic computer system, by combining a simple additional circuit and an existing signal. CONSTITUTION:From the channel interface, signals 11-13 are inputted to an AND gate 3 through an AND gate 2 and a flip-flop 5. From the device interface, a signal 14 is inputted to an AND gate 4. From a microprogram, a reset instruction signal 15 is inputted, and is inputted to a reset terminal RST of a free- running counter 7 together with outputs of the AND gate 3 and 4. Signals 11-15 are transmitted without fail in the normal state, therefore, the free-running counter 7 is reset without fail. In the event of a system loop state, the signals 11-15 are not operated, the free-running counter continues counting, overflows and generates a carry signal. This carry signal is used as a system loop detecting signal. |
