| 摘要 |
The performance of carrier and/or timing recovery circuits which control the recovery of data signals from modulated quadrature-related carrier signals is improved by the use of a phase detector which correlates the two most significant bits of the data signals. This correlation significantly reduces the acquisition time, i.e., the time required for these circuits to acquire synchronous operation. Moreover, this correlation can be advantageously combined with correlations of the most and least significant bits of the data signals to reduce phase jitter as well as reduce the acquisition time. |
