发明名称 MEMORY CONTROLLER
摘要 PURPOSE:To reduce the number of times of access and to realize a high-speed transfer, by outputting a writing instruction after carrying out a desired data process by a computer when a data process is required, in case a data transfer is carried out to a sequential access memory device. CONSTITUTION:A computer 1 delivers in a simple way a reading instruction to a sector requiring no change of its contents, and delivers a writing instruction to a sector requiring a change of its contents after giving a desired data process to the data that is read out by a reading instruction. In such way, a replacement of data equivalent to a track can be done in a simple way. As result, the access frequency is reduced and the data to be stored in a flexible disk device are renewed in a high speed.
申请公布号 JPS57136266(A) 申请公布日期 1982.08.23
申请号 JP19810021912 申请日期 1981.02.17
申请人 MITSUBISHI DENKI KK 发明人 FUJINAGA TAKASHI
分类号 G06F3/06;G06F5/06;G11B20/10 主分类号 G06F3/06
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