| 摘要 |
A central processing unit (CPU) is connected via a databus (DB) and a control bus (SB), on the one hand, to a number of memory areas (SP1, SP2, SP3) and, on the other hand, to an electronic logic unit (SCH) which, in dependence on commands from the central processing unit (CPU), effects the storing of data in one of the memory areas (SP1, SP2, SP3) and/or the removal of data from one of the memory areas (SP1, SP2, SP3). <IMAGE>
|
