| 摘要 |
PURPOSE:To reduce the number of pins while increasing circuits which can be mounted to the inside by mounting a circuit latching the output of an input level detecting circuit to a multifunctional input terminal and using the output of the latch circuit as signals for testing the inside. CONSTITUTION:The multifunctional input terminal IN2 is connected to the input level detecting circuit consisting of E/DMOS elements N21, N22 and a circuit G21 for a function. The output of the level detecting circuit is connected to the set input of the flip-flop type latch circuit formed by NAND gates G22, G23, and signals activating a test circuit are outputted to a terminal OUT22 from the latch circuit. When voltage exceeding VCC is applied to the IN2, the latch circuit is set, and the OUT22 is at a low level, and thereafter continues a test mode condition until reset signals R are inputted. On the other hand, output signals corresponding to input are outputted to the OUT21 even at the time of a test mode. Accordingly, the number of the pins can be reduced and the mounting density of the internal circuits can be increased because a fixed level need not be inputted to the input terminal at all times when the test mode. |
