| 摘要 |
PURPOSE:To make a high-speed read/write possible, by utilizing the potential difference between the base potential of an on-side transistor TR and a word line to prevent saturation of the on-side TR. CONSTITUTION:In the storage device having an emitter coupled bipolar memory cell which has a load resistance clamped by a clamp diode, the load resistance, an amplification factor hFE of a TR, and a read/write current IRW are adjusted to generate a potential difference between the base potential of an on-side TR and a word line. This potential difference is set to such sufficiently large value that the on-side TR is not saturated. The load resistance RL, the amplification factor hFE of the TR, and the read/write current IRW are adjusted to satisfy (IRW)/ (hFE)RL>0.2V. |
