| 摘要 |
Test apparatus designed to be coupled to a transmitter including a local oscillator and mixer for reducing the received carrier frequency, a frequency counter for counting the IF cycles, a subtractor for subtracting the counted value from the actual value of the desired frequency, time averaging circuitry for finding the average error in a plurality of counts and display means for displaying the average error. The frequency counter is a gate time counter which normally counts for a one-tenth second period but increases the counting time to one second when the error is reduced below +/-10 Hertz.
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