发明名称 MEASURING CIRCUIT FOR ANTI-NOISE PERFORMANCE OF PNPN SWITCH
摘要 PURPOSE:To automatically prevent an erroneous decision caused by a defective contact of a measuring terminal, by forcibly giving the ignition to a switch element after measuring the anti-noise performance of the switch element. CONSTITUTION:A ramp function voltage waveform VA is applied between the anode and the cathode of a PNPN switch element 1 to measure the dv/dt value. In this case, a delay pulse generating circuit 50 is provided to give a forcible ignition to the element 1 at a time point when a delay is caused by TG from the moment when the ramp function voltage VA is produced, along with a delay pulse generating circuit 43 which produces a pulse CP1 to detect an erroneous ignition owing to the dv/dt value of the element 1 when a delay is caused by T1 and a delay pulse generating circuit 44 which produces a pulse CP2 to detect a defective contact of the measuring terminal of the element 1 when a delay is caused by T2. Then T1<TG, T2 is satisfied among the delay times TG, T1 and T2 respectively. Thus the measurement of the dv/dt value and the detection for the detect of the measuring terminal are carried out in a time series way.
申请公布号 JPS57132070(A) 申请公布日期 1982.08.16
申请号 JP19810016986 申请日期 1981.02.09
申请人 HITACHI SEISAKUSHO KK 发明人 SAGAWA AKIO;SUZUKI MASAYOSHI;IZAKI NAOYUKI
分类号 G01R31/26 主分类号 G01R31/26
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