发明名称 SHARED MEMORY ACCESS SYSTEM
摘要 PURPOSE:To expand a dedicated memory area in each processor, by providing a shared memory only in one processor. CONSTITUTION:When a microprocessor B12 performs data transfer to the shared memory 21, an address M-l is set on a memory spatial register 16 to select one bank 22 of the shared memory 21 from the microprocessor B12. Next, the microprocessor B12 accesses to an address N-l0 in a shared memory access area 23. An address decoder 15 detects the fact that the shared memory access area 23 has been selected, and outputs a stop instruction to a microprocessor A11 automatically via a stop instruction line 107. The microprocessor A11 sends an operating state display signal which represents the stop of an operation to the memory spatial register 16, an address line switching circuit 17, a data line switching circuit 18, and a control line switching circuit 19 via an operating state display line 108.
申请公布号 JPS63148364(A) 申请公布日期 1988.06.21
申请号 JP19860294894 申请日期 1986.12.12
申请人 OKI ELECTRIC IND CO LTD 发明人 SUDO NAGAKATSU
分类号 G06F15/16;G06F12/00;G06F15/17;G06F15/177 主分类号 G06F15/16
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