| 摘要 |
<p>PURPOSE:To shorten access time to reduce power consumption by using a transistor (TR) which turns on temporarily during switching from chip selection to nonselection or reverse switching in power-down mode. CONSTITUTION:A memory cell Mij consists of a flip-flop composed of load resistances R1 and R2 and MOSTRs Q1 and Q2, and MOSTRs Q3 and Q4 constituting a transfer gate. When a chip becomes unselected, MOSTRs Q10-Q13 discharge a data bus couple DB to an intermediate level temporarily and when the chip is selected, the data bus lines are charged to a high level temporarily. While the data has couple DB are both held at the high level, reading operation is performed by connecting the cell to the bit line couple or the bit line couple to the data buses. Changes from the levels H and H are made rapidly and high- speed reading operation is therefore performed.</p> |
