| 摘要 |
The binary state of each cycle of a biphase modulated input signal is detected by a "D" flip-flop when it is clocked by a locally-generated reference signal. When the binary state of the input signal has a first value at clocking, the reference signal is passed through a first exclusive OR gate unchanged. When the binary state of the input signal has the opposite value, the reference signal is inverted by the same OR gate. The output of the first OR gate and the input signal are applied to a second exclusive OR gate to provide a pulse train having a duty cycle indicative of the phase error between the input signal and the reference signal. The latter pulse train is filtered and used to adjust the phase of the reference oscillator until the phase error is eliminated and the circuit is in balance. The binary state of the flip-flop is indicative of the binary state of the input signal.
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