| 摘要 |
A data signal receiver (100) forms line samples of a received modulated data signal and applies them to a fractionally spaced equalizer (150). The equalizer outputs are demodulated and decisions are formed as to the values of the transmitted data symbols. An error signal is also formed. This is used to update the values of coefficients used in the equalizer. The equalizer itself is comprised of a plurality of equalizer sections (220, 240, 260, 280) each of which multiplies ones of the line samples with respective ones of the coefficients to form a partial sum. Each equalizer section includes an internal accumulation circuit (225) which detects the arrival of an applied accumulation input signal and, in response, adds its partial sum thereto to generate an accumulation output signal. The latter serves as the accumulation input signal for another equalizer section. The accumulation output signal of the last equalizer section to receive an accumulation input signal constitutes the overall equalizer output.
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