| 摘要 |
PURPOSE:To prevent the lowering of drain dielectric resistance due to the stacking of the impurity diffusion of a MIST by forming one conduction type layer penetrating an opposite conduction type layer shaped to one conduction type semiconductor substrate toward the substrate from the surface and forming an insulating gate to the surface of the penetrating layer. CONSTITUTION:An N type epitaxial layer 2 is grown on the surface of the P type Si substrate 1, and the P type penetrating layer 4 and separation layers 3 are shaped penetrating the epitaxial layer 2. A gate electrode 8 is molded to the surface of the penetrating layer 4 through a gate insulating layer 7c. N<+> type layers 7a, 7b for extracting electrodes are formed to N type layers 5a, 5b functioning as a source and a drain at both sides of the penetrating layer. When forming a CMOS, the P channel MIST is shaped to another N type layer 6. Accordingly, the impurity concentration of the P type penetrating layer 4 is lowered and the radius of curvature of penetrating diffusion is enlarged, and the drain dielectric resistance of the MIST can be increased. |
