发明名称 FIELD DISCRIMINATING CIRCUIT
摘要 PURPOSE:To exactly set a field discriminating period, by using a counter for setting said discriminating period. CONSTITUTION:This circuit is provided with a counter 14 for counting each vertical synchronizing, equivalent and horizontal synchronizing pulse existing in a vertical blanking period, a pulse generator 12 for generating a pulse from starting to count the number prescribed in advance to the end, a pulse generator 15 for generating a pulse in case when a signal whose period is different from a prescribed period has been inputted, a gate circuit 16 to which an output of each pulse generator 12 and 15 is inputted, and an FF17 to which an output of this gate circuit is inputted. In this state, an odd field and an even field are discriminated by an output level of the FF17. In this way, the pulse counter for counting a synchronizing signal is used for setting a field discriminating period, and when this counter counts the prescribed number of pulses, the pulse generator 12 is reset, therefore, the field discriminating period is set exactly.
申请公布号 JPS57129071(A) 申请公布日期 1982.08.10
申请号 JP19810014561 申请日期 1981.02.03
申请人 ALPS DENKI KK 发明人 MAZAKI YOUSUKE
分类号 H04N5/10;(IPC1-7):04N5/08 主分类号 H04N5/10
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