| 摘要 |
PURPOSE:To easily perform the channel control and to improve the electrical characteristics for the subject semiconductor device by a method wherein, when a J-FET and a bipolar transistor are provided on the same semiconductor substrate, the gate of the FET is split into a plurality of gates, and shallow source regions are provided in a contact state among the split gates. CONSTITUTION:N<+> type buried regions 32a and 32b are formed by diffusion on a P type Si substrate 31, an N type layer 33 is epitaxially grown on the whole surface including the above regions, and the layer 33 is divided into island type layers 33a and 33b respectively, including the regions 32a and 32b, using a P type region 34 reaching the substrate 31. Then, the P type gate regions 35a-35c, to be used for the J-FET, are formed by diffusion in the island-formed layer 33 leaving an interval among them, and the P type base region 35d to be used for the bipolar transistor is provided in the layer 33b. Subsequently, shallow N type source regions 36b and 66a are formed by diffusion between the regions 33a and 35b, and 35b and 35c, an N type emitter region 36d is provided in the region 35d, and then an N<+> type collector lead-out region 35e is formed by diffusion at the end section of the layer 33b. |
