| 摘要 |
PURPOSE:To reduce the power consumption of an oscillating circut having a complementary IG-FET circuit constitution, by setting the output resistance of the 1st CMOS inverter higher than those of the 2nd and 3rd inverters. CONSTITUTION:The gm of IG-FETs N1 and P1 used in an inverter I1 or the measurement of an IG-FEW, i.e., the ratio between the width and the length of channel is set considerably smaller than those of IG-FETs N2, P2, N3 and P3 used for inverters N2 and N3. Then the output resistance of the 1st CMOS inverter is set at a large value to ensure a highly stable oscillating action. Thus the power consumption of an oscillator can be reduced. |
