| 摘要 |
<p>PURPOSE:To shorten the setup time of an ROM by reducing diffused capacitors and diffused resistances by inserting MOS transistors (TR) in series between output terminals and a power line arranged in parallel to gate input wirings, and by connecting the gate input wirings to the MOSTRs selectively. CONSTITUTION:A power line V is arranged in parallel to gate input wirings (a)-(i) each provided with an output buffer circuit Bv at one terminal and extending in one direction. Between the line V and output terminals A-C, MOSTRs TR1, TR2, TR3 and TR4, and TR5 and TR6 are connected in series, and the gates of the TR1-TR6 are connected to the wirings (a)-(i) selectively, thereby minimizing the lengths of a diffused wiring connecting with the source of the TR1, a diffused wiring C connecting the TR1 and TR2, and a diffused wiring connecting the drain of the TR2 and terminal A. Other couples of TRs are the same and diffused capacitors and diffused resistances are reduced to shorten the setup time of an ROM.</p> |
