| 摘要 |
PURPOSE:To generate a vertical synchronizing signal stably, by controlling the phase of a counter for generating a vertical drive signal by an AND output between the vertical synchronizing signal and a signal of the guadruple frequency of the horizontal frequency. CONSTITUTION:A vertical synchronizing signal is applied to a terminal 1, and the oscillation output having the guadruple frequency of the horizontal frequency is applied to a terminal 2, and they are applied to a NAND gate 4, and meanwhile, the oscillation output applied to the terminal 2 has the frequency divided to 1/2 by an FF3 to generate a frequency division output. When the output of the NAND gate 4 is used as a reset pulse to operate a counter 5, a carry pulse is generated after the number set by a digital switch is counted. When the carry pulse and the signal applied to the terminal 1 are used as a trigger pulse to operate a J-KFF 8, a stable vertical synchronizing signal is obtained in a terminal 10. |
