| 摘要 |
PURPOSE:To prevent a decrease in HIT rate even during program switching by providing two high-speed buffer memories and by loading the contents of a program to be executed next to one memory which is not in use at present. CONSTITUTION:An information processor which transfers the contents of a main storage device to a high-speed buffer memory temporarily and utilizes them is provided with two buffer memories. Under the control of control flags which show the operation states of the high-speed buffer memories, information on a program to be executed next by the information processor is transferred from the main storage device to one high-speed buffer memory which is not used by the information processor at present and when the control is passed to the program, the high-speed buffer memory is utilized. For example, two buffer memory control parts A and B constituted as shown by the figure, a control register 1, etc., are provided to perform said control. |
